https://qsysarch.com/categories/sillicon/Recent content in Sillicon on QSysArch - Quantum Computer System ArchitectureHugoen-usSun, 14 Jun 2026 00:00:00 +0000https://qsysarch.com/posts/qubit-modalities-transmon-qpi-architecture/Sun, 14 Jun 2026 00:00:00 +0000https://qsysarch.com/posts/qubit-modalities-transmon-qpi-architecture/<img src='https://qsysarch.com/images/qubit-modalities-transmon/fiairchild-4-transistors-IC-in-1961.webp' style='width:180px;float:right;'> <p>Before diving deep into the fantastic world of Quantum Error Correction, I thought it would be useful to have a short memo explaining how QPUs are architected, and in particular, how 1- and 2-qubit gates are implemented at the hardware silicon level.</p> <p>The challenge in writing such a memo is that there are many QPU architectures, or modalities, so I will start with one of the common modalities: the superconducting Transmon qubit.</p>